Two-Level NAND Gate Implementation Example (4.2)

• _f(X,Y,Z) = Sm(0,6)

1. Express f in SOP form: f = X’Y’Z’ +XYZ’

2. Obtain the AND-OR implementation for f.

3. Add bubbles and inverters to transform AND-OR to NAND-NAND gates.

• Two-level implementation with NANDs

Two-Level NOR Gate

Implementation Example

• f(X,Y,Z) = ПM(0,6)   
• 1. Express f’ in SOP form:

1. f’ = Sm(1,2,3,4,5,7)= X’Y’Z + X’YZ’ + X’YZ + XY’Z’ + XY’Z + XYZ

2. f’ = XY’ + X’Y + Z

2. Take the complement of f’ to get f in the POS form: f = (f’)' = (X'+Y)(X+Y')Z'

3. Obtain the OR-AND implementation for f.

4. Add bubbles and inverters to transform OR-AND implementation to NOR-NOR implementation.

• Two-level implementation with NORs